Retym, Inc Tech Stack

Coherent DSP semiconductors for AI data center interconnects

Semiconductor Manufacturing Cupertino, CA 51–200 employees Founded 2021 Privately Held

Retym designs coherent DSP chips for high-bandwidth, low-latency data center connectivity—a direct response to AI workload growth outpacing network capacity. The tech stack (SystemVerilog, UVM, Cadence, Synopsys, advanced process nodes) and project mix (RTL-to-GDSII flow, high-end ADC/DAC development, DFT strategy) reveal a mature semiconductor design operation scaling toward production. The engineering-heavy org (33 of 35 active hires are engineers, mostly senior) paired with challenges around timing closure, power budgets, and cross-site coordination suggests a company in ramp-up phase, building out a second engineering hub.

Tech Stack 50 technologies

Core StackMATLAB Python C++ Jenkins GitHub Actions GitLab Tessent SystemVerilog UVM Ethernet C/C++ Synopsys Cadence Verilog Virtuoso SerDes FinFET Coherent DSP OrCAD Allegro C Perl Tcl TCL PCIe Bash Embedded Linux Windows Git Embedded C+18 more

What Retym, Inc Is Building

◆Challenges

Timing closure
Aggressive power consumption targets
Complex ip integration
Developing high end adc/dac in advanced process
Low power budget
Scaling new engineering site
Cross-location coordination
Talent development
High data rate optical transceiver development
Efficient dsp algorithm implementation

▲Active Projects

Ip integration
Adc/dac development for optical communication
Test plan for special analog ips
Soc dft strategy and architecture
High end adc/dac in an advanced process for optical communication
Ramp-up full rtl2gdsii flow
Improve existing implementation flows
Dft logic insertion
Demand generation & gtm design for product launches
Integrate austin site deliverables into product development

Hiring Activity

Minimal35 roles · 2 in 30d

Department

Engineering

Marketing

Seniority

Senior

Lead

Junior

Director

Notable leadership hires: Marketing Director, DFT Lead

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About Retym, Inc

Retym is a semiconductor company founded in 2021 and based in Cupertino, developing coherent DSP solutions for optical communication infrastructure. The product targets hyperscaler data centers where AI interconnect bandwidth has become a capacity constraint. Core technical work spans analog IP (high-speed ADCs/DACs), digital signal processing, and design-for-test architecture on advanced process nodes. The company operates engineering teams across the United States, Armenia, and Israel, with active recruitment focused on senior chip designers and DFT specialists. Current priorities include RTL-to-GDSII flow maturation, IP integration, and demand generation for product launches.

HeadquartersCupertino, CA

Company Size51–200 employees

Founded2021

Hiring MarketsUnited States, Armenia, Israel

Frequently Asked Questions

What semiconductor design tools does Retym use?

Retym's stack includes Synopsys (synthesis, simulation) and Cadence (layout, simulation, analog design via Virtuoso), with SystemVerilog and Verilog for RTL, UVM for testbenches, and Tessent for DFT.

Is Retym hiring engineers?

Yes. 33 of 35 active roles are engineering positions, predominantly senior-level (27 seniors, 3 leads, 2 juniors). Recent posts include DFT Lead and other chip design roles.

Where are Retym's engineering offices?

Retym hires engineers across the United States, Armenia, and Israel. The company is in active site ramp-up, with notable challenges around cross-location coordination.