Retym is a Cupertino fabless semiconductor startup designing coherent DSP silicon for optical interconnects. Its stack (SystemVerilog/UVM, Synopsys and Cadence flows, Tessent DFT, TSMC FinFET, SerDes) points to a full in-house ASIC build, with hiring overwhelmingly senior engineering and an emerging site in Armenia. Recurring pains around power targets, timing closure and ramping an RTL-to-GDSII flow suggest a team pushing toward first silicon tape-out.
Retym, Inc. is a privately held semiconductor company founded in 2021 and headquartered in Cupertino, California. It develops coherent digital signal processing (DSP) chips that enable high-bandwidth, low-latency optical connectivity for AI infrastructure and data center interconnects. Its customers are optical module makers serving hyperscale and telecom networks. The company employs 51–200 people and hires engineering talent in the United States and Armenia.
Retym designs coherent DSP semiconductors for optical transceivers used in AI data centers and data center interconnects, including ADC/DAC development for optical communication.
Retym uses Synopsys, Cadence, Virtuoso and Tessent, with SystemVerilog, UVM, Verilog, VHDL, SystemC, C++, MATLAB and Python, targeting TSMC FinFET processes, plus Jenkins and GitLab.
Retym is headquartered in Cupertino, CA and hires in the United States and Armenia, with demand concentrated in senior engineering roles such as RTL, DFT, verification and analog design.
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Retym, Inc's technology stack, projects, and hiring signals are inferred from public hiring and company data — career pages, public listings, and company web presence — then clustered and de-duplicated. Figures are estimates that refresh over time. Read our full methodology →
This is not an official vendor or customer list. It is a technology-adoption signal inferred from public data, intended for B2B research.
