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InnoPhase IoT Tech Stack
Ultra-low power Wi-Fi + multi-protocol SoCs for battery-constrained IoT
InnoPhase IoT designs wireless SoCs targeting extreme power efficiency in IoT devices. The tech stack—Verilog, SystemVerilog, Cadence, UVM, Xcelium—reflects a hardware-first, verification-heavy design process typical of semiconductor startups. Project focus on SoC verification, RF test solution development, and secure boot mechanisms shows a company in active product hardening and manufacturing scale-up phase, with pain points concentrated on high-volume test challenges and RF characterization.
Tech Stack 39 technologies
Core StackPython Verilog SystemVerilog Perl Jasper Bluetooth Zigbee Ultra-Wideband Ethernet FPGA ASIC CDC Cadence TCL ARM Cortex-M ARM TrustZone J-Link C/C++ FreeRTOS Zephyr UVM Xcelium Tcl WiFi Bluetooth Low Energy WiMAX LTE Teradyne Advantest Chroma+9 more
What InnoPhase IoT Is Building
◆Challenges
- High-volume manufacturing test challenges
- Rf test solution development
- Test failure investigation
▲Active Projects
- Soc verification
- Novel soc products for connectivity and communications
- Hw/sw co-verification environment
- Low power soc signoff
- Ulp iot solution firmware development
- Secure boot and firmware update mechanisms
- Rf test solution for soc devices
- Rf test plans for wi-fi and bluetooth devices
- Scalable test solution for high-volume manufacturing
- Bluetooth controller firmware development
Hiring Activity
15 roles · 2 in 30d
Department
Seniority
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