Analog computing chips for AI inference at ultra-low power
TetraMem builds analog compute-in-memory hardware for AI workloads, using a deep stack of chip-design tools (SystemVerilog, SPICE, Synopsys, Cadence) and AI frameworks (PyTorch, TensorFlow, JAX, ONNX, TensorRT). The hiring profile is intern-heavy (12 of 17 roles) alongside senior engineers, reflecting a company scaling from R&D into production—projects range from RTL design and chip characterization to neural network deployment and model compression, while pain points center on operationalizing manufacturing and team scaling.
TetraMem develops analog computing solutions designed for AI inference, with a focus on performance and power efficiency. The company is structured around hardware design (SystemVerilog, Verilog, SPICE) and AI software integration (PyTorch, TensorFlow, neural network deployment frameworks). Active projects include compute-in-memory chip design, reliability testing, device performance optimization, and model compression for analog hardware. The organization is based in San Jose with 51–200 employees and is hiring across the United States and Singapore, primarily in engineering roles.
Hardware: SystemVerilog, Verilog, SPICE, Synopsys, Cadence, Mentor Graphics. AI/ML: PyTorch, TensorFlow, JAX, ONNX, TensorRT, Core ML, MLIR, LLVM, XLA. Infrastructure: Python, C++, GCC, Clang, FPGA, ASIC design tools.
AI accelerator RTL design, compute-in-memory chip verification, neural network deployment on analog hardware, model compression for analog chips, device performance testing, and manufacturing readiness (ERP, asset tracking).
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