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Ayar Labs builds optical I/O silicon to replace electrical interconnects in AI systems. The stack—dominated by hardware design tools (Cadence, Innovus, Verilog, MATLAB, silicon photonics simulation) paired with infrastructure software (Slurm, AWS X-Ray, SerDes)—reflects a company executing deep silicon and systems engineering. Active hiring skews heavily toward senior and principal engineers, with projects spanning chip design, test automation, and production validation, suggesting they're scaling from prototype toward volume manufacturing.
Tech Stack 66 technologies
Core StackPython Jira Make MATLAB Linux C++ AutoCAD C Git ARM SerDes AWS X-Ray Verilog JMP Windows Oscilloscope Verilog-A Slurm JESD204C BERT Ethernet PCIe Cadence Virtuoso KLayout Design Compiler Innovus CMOS Shapr3D Zemax Silicon Photonics+36 more
AdoptingSerDes
What Ayar Labs Is Building
◆Challenges
- Removing bottlenecks created by electrical i/o
- Removing bottlenecks limiting next-gen ai
- Reducing test times
- Improving yield
- Enabling high volume production testing
- Reducing test time and cost
- Reducing dpm
- Ensuring product meets component and system-level requirements
- Scaling ai compute hardware
- Volume manufacturing test flow optimization
▲Active Projects
- Dft feature implementation
- New product introduction
- Validation strategy development
- Implement cutting-edge optoelectronic test hardware
- Optical i/o product roadmap
- Phi roadmap development
- Development of subsystems in an electro-optical soc
- Bring-up and debug of custom silicon
- Build data infrastructure for layout analysis and automated checking
- Photonic chip design and layout tool development
Hiring Activity
60 roles · 15 in 30d
Department
Seniority
Notable leadership hires: Quality Director
Company intelligence
