C
Cornelis Networks Tech Stack
Lossless, congestion-free networks for AI and HPC at scale
Cornelis Networks builds high-performance interconnect hardware and software for AI training and HPC workloads, grounded in the Omni-Path architecture. The tech stack reveals a company optimizing across the full ML training stack—CUDA, PyTorch, TensorFlow, Megatron-LM, DeepSpeed—while operating at the silicon layer (Verilog, SystemVerilog, RTL design, ASIC development). Heavy engineering hiring (25 roles, mostly senior and principal) alongside active silicon validation and fabric management projects signals they are executing a complex product roadmap from chip design through Kubernetes integration.
Tech Stack 82 technologies
Core StackNetSuite Python MATLAB Kubernetes Go PyTorch TensorFlow C++ Questa Perl TCL UVM Ansys HFSS Keysight ADS Synopsys VCS Verilog SystemVerilog NCCL CUDA ROCm JAX DeepSpeed Megatron-LM libfabric RDMA RoCEv2 FreeBSD DPDK Omni-Path InfiniBand+52 more
What Cornelis Networks Is Building
◆Challenges
- Meeting demanding computational challenges
- Executing complex networking development programs
- First pass silicon success
- Expanding into emea ai and hpc markets
- Integrating fabric management with kubernetes
- Scalability challenges for storage environments
- Performance issues in distributed storage
- Performance and scalability of ai networking
- Scaling accounting processes during rapid growth
- Delivering industry-leading performance
▲Active Projects
- Integration of fabric management with kubernetes
- Next-generation switch asic platform
- Technology roadmap alignment
- Joint go-to-market activities
- Pcie controller integration into next-generation socs
- Silicon bring-up and validation of pcie links
- Host fabric interface performance optimization
- High-speed data path rtl design
- Upstream open-source storage software contributions
- Benchmarks for storage workloads
Hiring Activity
35 roles · 25 in 30d
Department
Seniority
Company intelligence
