AI silicon design and verification for scalable compute
Tsavorite is building custom silicon for AI workloads, with a stack spanning low-level hardware description (SystemVerilog, PCIe, x86/ARM) through ML frameworks (PyTorch, vLLM, llama.cpp) to frontend tooling (React, Next.js). The hiring profile is heavily principal and staff engineers focused on FPGA prototyping, chiplet design, and verification — indicating deep hardware-software co-design. Active projects center on sub-system verification, UCIe controllers, and an omni processing unit, while pain points cluster around verification infrastructure scaling and regression time, typical of pre-production silicon teams.
Notable leadership hires: FPGA Prototyping Lead, FPGA Lead
Tsavorite Scalable Intelligence, founded in 2023 and based in Milpitas, designs and verifies custom silicon for AI compute. The company operates across multiple layers: hardware description and verification (SystemVerilog, UVM, FPGA), chiplet and SoC architecture, ML runtime and software stack integration (PyTorch, ONNX, vLLM, llama.cpp), and application-facing tooling (React, Next.js, FastAPI). The 51–200-person team is heavily weighted toward engineering (primarily principal and staff level), with active work on chiplet verification, UCIe controller verification, omni processing unit development, and high-power PCB design.
Hardware: SystemVerilog, PCIe, x86, ARM, FPGA. ML/runtime: PyTorch, ONNX, vLLM, llama.cpp, TensorFlow, ONNX Runtime. Software: Python, Rust, FastAPI, Flask, React, Next.js, Node.js, Docker, Linux, gRPC. Recently adopting UVM for verification environments.
Custom AI silicon: sub-system chiplet verification, FPGA prototyping, UCIe controller verification, omni processing unit development, and leading-edge AI product package design. Also building ML runtime and software stack support for these processors.
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