Riverlane Tech Stack

Quantum error correction software and hardware for fault-tolerant quantum computing

Software Development Cambridge, England 51–200 employees Founded 2016 Privately Held

Riverlane builds quantum error correction (QEC) technology—software decoders and proprietary hardware—that catches and fixes qubit errors at the scale required for practical quantum computers. The stack is heavy on FPGA tooling (Xilinx, Altera, Synopsys) and low-level systems work (SystemVerilog, C++, LLVM/MLIR), reflecting the hardware-close nature of the problem. Hiring leans engineering and research (27 and 11 roles respectively, mostly senior and staff), with active recruitment across UK, US, and Netherlands—a pattern typical of deep-tech companies scaling toward commercial partnerships.

Tech Stack 22 technologies

Core StackLinux Python Ansible C++ Jira Confluence FPGA Red Hat Slurm Bash Synopsys pytest Xilinx AMD Altera Git SystemVerilog UVM C R LLVM MLIR

What Riverlane Is Building

◆Challenges

Fault-tolerant quantum computing
Integrating qec stack into control systems
Solving qec
Ensuring product quality
Rapidly evolving technology requirements
Quality of hardware and software systems
Real-world deployment
Reliability of hpc systems
Scaling quantum computing
Developing quantum error correction stack

▲Active Projects

Deltaflow qec stack
World’s first qec stack
Implementation of qec decoders on hardware
Develop high-performance decoders for quantum error correction
Decoding algorithms
Runtime systems for large-scale fault-tolerant quantum computers
Rapid qec experiment prototyping
Future development of our testing framework
Toolchain for hardware partners
Large-scale error-corrected quantum computation

Hiring Activity

Accelerating40 roles · 25 in 30d

Department

Engineering

Research

Legal

Ops

Seniority

Senior

Mid

Staff

Director

Principal

Notable leadership hires: Director of Testing

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About Riverlane

Riverlane, founded in 2016 and based in Cambridge, develops QEC technology that identifies and corrects quantum computing errors at very high speed—millions to billions of times per second. The company works with quantum hardware manufacturers, government bodies, and high-performance computing centers. Their flagship project is the deltaflow QEC stack, a toolchain and runtime system designed to integrate error correction into quantum computers at scale. The team combines software engineers, quantum researchers, and hardware specialists to tackle the core challenge: making quantum computers reliable enough to run useful calculations.

HeadquartersCambridge, England

Company Size51–200 employees

Founded2016

Hiring MarketsUnited Kingdom, United States, Netherlands

Frequently Asked Questions

What tech stack does Riverlane use?

Primarily FPGA tools (Xilinx, Altera, Synopsys), systems languages (C++, SystemVerilog, C), and compiler infrastructure (LLVM, MLIR). Linux, Bash, Python, Git, and Jira support development and operations.

What is Riverlane working on?

The deltaflow QEC stack, high-performance quantum error correction decoders, runtime systems for fault-tolerant quantum computers, and integration toolchains for hardware partners. Active focus on testing frameworks and rapid prototyping.