GNSS system-on-chip designer optimizing for low power and multi-constellation accuracy
Qualinx is a fabless semiconductor company designing GNSS SoCs (QLX300) that consolidate GPS, Galileo, GLONASS, and Beidou reception with exceptional power efficiency and cost. The tech stack—MATLAB, SystemVerilog, Cadence, ARM Cortex-M, plus wireless protocols (Bluetooth LE, LTE, LoRA, NB-IoT)—reflects a chip-design outfit bridging analog RF and digital baseband. The hiring profile is heavily engineering-weighted with senior and mid-level roles dominating, and the active project list (GNSS algorithm optimization, digital baseband design, volume production ramp-up, reliability qualification) shows the company is transitioning from design validation into manufacturing scale.
Qualinx, founded in 2015 as a Delft University of Technology spin-off, develops low-power GNSS receivers for wearables, asset tracking, digital cameras, and IoT applications. The QLX300 chip is a multi-constellation system-on-chip in CMOS targeting smallest footprint, lowest power draw, and fastest time-to-first-fix. The company operates as a fabless design house with 11–50 employees based in Delft, Netherlands, currently executing production ramp-up and supplier qualification workflows alongside ongoing algorithm refinement for power and speed optimization.
The QLX300, a GNSS system-on-chip in CMOS that receives signals from multiple constellations (GPS, Galileo, GLONASS, Beidou) with minimal power consumption and footprint for wearables, tracking, cameras, and IoT.
MATLAB, SystemVerilog, Verilog, Cadence (EDA), ARM Cortex-M architecture, and wireless stacks including Bluetooth LE, LTE, LoRA, and NB-IoT for integration and validation.
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