RISC-V accelerator chips for HPC and AI workloads
Openchip designs and manufactures accelerator chips built on RISC-V architecture for high-performance computing and AI/ML applications. The stack—Verilog, SystemVerilog, VHDL, UVM, SystemC, plus TensorFlow and PyTorch—reflects a hardware-software co-design approach. Active projects span formal verification, compiler optimization, confidential computing, and Kubernetes-based AI platforms, while pain points cluster around silicon verification efficiency, AI inference performance, and cloud HPC workload scaling. Engineering dominates the 51–200-person org, signaling a pre-commercial hardware company in active design and validation phases.
Openchip is a European microelectronics company founded in 2024 and headquartered in Barcelona, Spain. The company designs accelerator chips for HPC, AI, and ML workloads using RISC-V architecture to build competitive alternatives and strengthen European digital sovereignty in microelectronics. The European Commission has designated Openchip an Important Project of Common European Interest, supporting its research and industrial deployment. Operations span hardware design (Verilog, SystemVerilog, VHDL tooling), software stacks (Linux, KVM, emulation via QEMU and Gem5), and cloud deployment frameworks. The company is actively hiring across engineering, security, and support roles across Spain, Italy, Belgium, Ireland, Canada, France, Poland, and Germany.
Openchip uses Verilog, SystemVerilog, and VHDL for hardware design, UVM and SystemC for verification, and RISC-V as the core instruction-set architecture. The stack also includes emulation tools (QEMU, Gem5) and virtualization platforms (KVM, Xen).
Current projects include AI compute kernel optimization for RISC-V, security features for RISC-V hardware, cloud AI deployment platforms, formal verification strategies, compiler framework extensions, and Kubernetes-based AI platform security architectures.
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