Tenstorrent Tech Stack

AI accelerator hardware design with RISC-V and advanced silicon manufacturing

Computer Hardware Manufacturing Toronto, ON 501–1,000 employees Founded 2016 Privately Held

Tenstorrent designs custom AI accelerator chips using RISC-V, Verilog, SystemVerilog, and Synopsys tools across an engineering-heavy org (133 of 154 roles). The project mix—CPU RTL, chiplet architectures, silicon bring-up, low-power design—reflects a company mid-cycle in bringing custom silicon to production. Pain-point clustering around signal integrity, power-performance optimization, and test cost reduction signals active foundry engagement and yield-hardening work.

Tech Stack 132 technologies

Core StackPython PyTorch C++ TensorFlow GitHub Verilog VHDL UVM FPGA RISC-V SystemVerilog Perl Verilator Assembly C/C++ JAX LLVM MLIR Innovus Tcl Synopsys VCS JTAG FinFET Gem5 C Git Visual Studio Code TCL SPICE Bash+102 more

AdoptingAnsible RISC-V

What Tenstorrent Is Building

◆Challenges

Complex infrastructure problems at scale
Ensuring high-speed si/pi performance
Configuration drift across sites
System bottlenecks and infrastructure vulnerabilities
Optimizing power performance area
Operating large-scale ai training environments
Functional timing power goals
Scaling compute demands
Improving development efficiency
Reducing test cost

▲Active Projects

Os lifecycle management
Custom ip blocks and soc components architecture
Low-power high-speed design
Silicon bring-up
Rtl design environment enhancement
Bare-metal provisioning pipelines
Cpu system rtl implementation
Performance-aware design decisions for compute, interconnect, or memory-heavy blocks
Next-generation soc chiplet architectures at advanced process nodes
Tt-forge

Hiring Activity

Steady150 roles · 60 in 30d

Department

Engineering

133

Sales

Design

Support

Ops

Security

Seniority

Senior

Staff

Mid

Lead

Director

Manager

Principal

Notable leadership hires: Emulation Validation Lead, CPU Physical Design Lead, Design Director

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About Tenstorrent

Tenstorrent builds custom AI accelerator processors for large-scale machine-learning inference and training workloads. Founded in 2016 and headquartered in Toronto with offices in Austin, Silicon Valley, Belgrade, Seoul, Tokyo, and Bangalore, the company operates as a systems-on-chip (SoC) design house, handling architecture, silicon implementation, and software compilation toolchains. The org spans 501–1,000 employees with deep expertise in computer architecture, ASIC design, RISC-V ISA, and neural network compilers. Hiring spans 10 countries and skews toward senior and staff-level engineers, reflecting the complexity of custom chip design.

HeadquartersToronto, ON

Company Size501–1,000 employees

Founded2016

Hiring MarketsCanada, Poland, Japan, United States, Syria, India, Cyprus, United Arab Emirates

Frequently Asked Questions

What technology does Tenstorrent use to design chips?

Tenstorrent uses Verilog, SystemVerilog, VHDL, and Python for hardware design; PyTorch and TensorFlow for model validation; LLVM and MLIR for compiler infrastructure; and Synopsys VCS, Innovus, and Verilator for simulation and physical design.

What is Tenstorrent currently building?

Active projects include CPU RTL implementation, next-generation SoC chiplet architectures, silicon bring-up workflows, low-power high-speed design, bare-metal provisioning pipelines, and tt-forge (a compiler/framework component).