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SmartSoC Solutions Pvt Ltd Tech Stack
Semiconductor design and embedded engineering services for SoC and ASIC tapeout
SmartSoC Solutions delivers full-stack semiconductor engineering: SoC design, physical design, DFT, FPGA, analog design, and embedded software. The tech stack (SystemVerilog, UVM, Synopsys, Cadence, Tessent) reflects deep IC design maturity. Active projects cluster around DFT architecture, power integrity, and post-silicon validation—the backend-heavy work that pulls critical-path schedules—paired with internal pain points on test coverage and power delivery optimization, indicating where customer pressure concentrates.
Tech Stack 13 technologies
Core StackPython SystemVerilog UVM C/C++ Synopsys DFT Compiler Tessent Synopsys Cadence Verilog VHDL TCL Perl JTAG
What SmartSoC Solutions Pvt Ltd Is Building
◆Challenges
- Ensure compliance with manufacturing test requirements
- Complex power delivery challenges
- Power delivery optimization
- Optimize test coverage
- High test coverage
- Reliable silicon performance
▲Active Projects
- Test plan development and atpg pattern generation
- Dft architecture implementation for soc/asic designs
- Power integrity architecture for advanced multi-die systems
- Next-generation power delivery solutions
- Dft design for soc tapeout
- Timing closure support
- Post-silicon pattern bringup
- Dft structure insertion and verification
Hiring Activity
8 roles · 2 in 30d
Department
Seniority
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