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SiPearl Tech Stack

European CPU designer for exascale supercomputers and AI data centers

Semiconductor Manufacturing Maisons-Laffitte, Île-de-France 51–200 employees Founded 2019 Privately Held

SiPearl designs ARM-based CPUs for high-performance computing infrastructure, with Rhea1 (80 cores, 61 billion transistors) now in production at TSMC for Europe's first exascale supercomputer. The hiring mix is heavily weighted toward senior engineers and interns—27 of 29 open roles—and skews toward verification and SOC validation work, reflecting the design-to-production complexity of processor silicon. Active projects center on next-generation CPU verification, interconnect architecture, and memory optimization for AI workloads.

Tech Stack 45 technologies

Core StackLinux Python GitLab GitHub TensorFlow PyTorch C++ x86 ARM RISC-V SystemVerilog UVM VHDL Verilog C/C++ TCL AXI PCIe Ethernet Synopsys VCS Xcelium C Git Embedded C ONNX Runtime TSMC Tcl Bash Synopsys Ultrascale++14 more

AdoptingRust

What SiPearl Is Building

◆Challenges

Ensuring functional correctness of processor ips
Complex soc verification
Evaluating new interconnect technologies
Understanding memory behavior in heterogeneous memory
Robustness of processor ips
Optimizing hpc workloads
Benchmarking ai software stack
Performance analysis for future processors
Best in class emulation platforms
Pre-silicon verification

▲Active Projects

Next-generation socs verification
Verification environment development
Rhea1 integration
Microprocessor verification platform architecture
Adoption of sipearl's next-generation server cpu platform
Pocs, performance benchmarks, and validation testing
Comparative study of interconnect solutions
Defining interconnect network configurations
In-chip communication library for verification processes
Visualizing memory access patterns with damon

Hiring Activity

Accelerating30 roles · 25 in 30d

Department

Engineering

27

Support

1

Seniority

Senior

13

Intern

11

Mid

3

Junior

1

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About SiPearl

SiPearl is a fabless semiconductor design company founded in 2019 and headquartered in Maisons-Laffitte, France, with operations in Spain and Italy. The company designs sovereign high-performance, energy-efficient CPUs targeting supercomputers, AI accelerators, and data-center infrastructure. Rhea1, completed in June 2025, powers JUPITER, Europe's first exascale supercomputer; Rhea2 will equip a second European exascale system; Athena1, a defense-hardened variant, launches end-of-2026. The company is seed-funded by the EU and raised a €130M Series A, with a Series B underway. Engineering-heavy org focused on CPU verification, interconnect design, and performance validation.

HeadquartersMaisons-Laffitte, Île-de-France

Company Size51–200 employees

Founded2019

Hiring MarketsFrance, Spain, Italy

Frequently Asked Questions

What is SiPearl's Rhea1 processor?

Rhea1 is an 80-core ARM Neoverse V1 CPU with 61 billion transistors, designed in Europe and currently in production at TSMC. It will power JUPITER, Europe's first exascale supercomputer capable of 1 billion billion calculations per second.

What tech stack does SiPearl use?

Design and verification: ARM, SystemVerilog, UVM, Verilog, VHDL, Synopsys VCS, Xcelium. Development: C/C++, Python, Linux. Manufacturing: TSMC. Recently adopting Rust.