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Mythic designs custom AI processors using analog compute-in-memory silicon, with a software stack centered on PyTorch, ONNX, and compiler infrastructure (MLIR, LLVM, XLA). The engineering-heavy org (19 of 22 active roles) is focused on RTL design, firmware, and toolchain work—signaling that chip tape-out and software-hardware co-design remain the critical path. Hiring has decelerated recently despite active recruitment, and the pain-point mix (first-silicon success, timing closure, aggressive PPA goals) reflects the high-stakes nature of custom silicon verification and manufacturing.
Tech Stack 50 technologies
Core StackPyTorch Hugging Face C++ Python Make ONNX C ARM CMake Bazel Yocto Git PCIe MIPI CSI-2 RTOS Verilog SystemVerilog UVM MLIR LLVM IREE XLA Torch-MLIR GPU FPGA Gurobi OR-Tools DSP Cadence Virtuoso SPICE+20 more
AdoptingFPGA
What Mythic Is Building
◆Challenges
- Verifying large ai workloads
- Aggressive ppa goals
- Performance, memory, and efficiency limits
- Migrating compiler flow to mlir
- Expanding pytorch interoperability
- Ensuring correctness of novel architecture
- Timing closure
- High-performance low-power design
- First-silicon success
- Scaling local organization
▲Active Projects
- Next-generation ai processor rtl design
- Dft feature implementation on chips
- Neural network conversion pipeline
- Analyze performance, bandwidth utilization, latency, and throughput of ai workloads in emulation
- Co-design next-generation compute accelerators
- Develop real-time firmware enabling neural networks
- Build linux kernel modules for low-latency data transfer
- Analog-aware software toolchain optimization
- Extending compiler irs for irregular control flow
- Unifying analog compute with digital subsystems
Hiring Activity
20 roles · 5 in 30d
Department
Seniority
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