Edge AI chip platform with integrated non-cellular 5G and on-device intelligence
Last Mile Semiconductor designs application-specific integrated circuits (ASICs) for edge AI inference, combining SystemVerilog/Verilog/VHDL chip design with proprietary non-cellular 5G connectivity in the 1.9 GHz band. The company is tackling long development cycles and complex technical requirements through FD-SOI (fully depleted silicon-on-insulator) architecture — a shift toward lower-power, smaller-geometry chip fabrication suited to distributed AI workloads that cannot rely on cloud connectivity or external networks.
Last Mile Semiconductor develops semiconductors for agentic edge AI systems deployed at scale in smart properties, smart cities, industrial automation, energy management, and critical infrastructure. Founded in 2022 and based in Dresden, Germany, the company combines integrated AI accelerators with on-device 5G-like wireless capability to enable billions of IoT and edge devices to process sensor data locally without cloud dependency. The platform targets markets where reliability, security, and digital sovereignty override cost optimization. The organization is engineering-heavy with concurrent focus on chip design automation and internal process optimization, reflecting both the technical depth required for ASIC development and the operational scaling of an early-stage hardware startup.
The stack centers on Cadence Virtuoso for analog IC design, SystemVerilog and Verilog for digital logic, VHDL for hardware description, and Calibre for physical verification and design rule checking.
Core projects include FD-SOI-based system development, non-cellular 5G communication platforms and technology, and analog integrated circuit design. Internal projects also cover process automation and administrative workflow improvements.
Other companies in the same industry, closest in size