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Last Mile Semiconductor Tech Stack

Edge AI chip platform with integrated non-cellular 5G and on-device intelligence

Semiconductor Manufacturing Dresden, Saxony 11–50 employees Founded 2022 Privately Held

Last Mile Semiconductor designs application-specific integrated circuits (ASICs) for edge AI inference, combining SystemVerilog/Verilog/VHDL chip design with proprietary non-cellular 5G connectivity in the 1.9 GHz band. The company is tackling long development cycles and complex technical requirements through FD-SOI (fully depleted silicon-on-insulator) architecture — a shift toward lower-power, smaller-geometry chip fabrication suited to distributed AI workloads that cannot rely on cloud connectivity or external networks.

Tech Stack 10 technologies

Core StackConfluence SystemVerilog Verilog VHDL ASIC 5G VGA Cadence Virtuoso Microsoft 365 Calibre

What Last Mile Semiconductor Is Building

Challenges

  • Developing non-cellular 5g
  • Developing fd-soi-based systems
  • Long development cycles
  • Complex technical requirements
  • Cost and budget optimization
  • Process automation
  • Process documentation

Active Projects

  • Fd-soi-based system development
  • Non-cellular 5g technology development
  • Analog integrated circuit design
  • Non-cellular 5g communication platform
  • Non-cellular 5g for all
  • Automation of administrative processes
  • Process improvement for admin, hr, finance
  • Team and company event organization
  • Funding management for research projects

Hiring Activity

Steady8 roles · 3 in 30d

Department

Engineering
5
Finance
1
Ops
1
Sales
1

Seniority

Senior
3
Staff
2
Manager
1
Mid
1
Principal
1
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About Last Mile Semiconductor

Last Mile Semiconductor develops semiconductors for agentic edge AI systems deployed at scale in smart properties, smart cities, industrial automation, energy management, and critical infrastructure. Founded in 2022 and based in Dresden, Germany, the company combines integrated AI accelerators with on-device 5G-like wireless capability to enable billions of IoT and edge devices to process sensor data locally without cloud dependency. The platform targets markets where reliability, security, and digital sovereignty override cost optimization. The organization is engineering-heavy with concurrent focus on chip design automation and internal process optimization, reflecting both the technical depth required for ASIC development and the operational scaling of an early-stage hardware startup.

HeadquartersDresden, Saxony
Company Size11–50 employees
Founded2022
Hiring MarketsGermany

Frequently Asked Questions

What semiconductor design tools does Last Mile Semiconductor use?

The stack centers on Cadence Virtuoso for analog IC design, SystemVerilog and Verilog for digital logic, VHDL for hardware description, and Calibre for physical verification and design rule checking.

What technology is Last Mile Semiconductor developing?

Core projects include FD-SOI-based system development, non-cellular 5G communication platforms and technology, and analog integrated circuit design. Internal projects also cover process automation and administrative workflow improvements.

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