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JLSemi Limited Tech Stack

Ethernet and automotive silicon design with focus on PHY and SoC architecture

Semiconductor Manufacturing Shanghai 51–200 employees Founded 2009 Privately Held

JLSemi designs high-performance Ethernet and automotive Ethernet silicon using advanced process nodes (FinFET) and mixed-signal architectures. The company's stack—Verilog, SystemVerilog, Calibre, FPGA tools, and SAP/Oracle for ops—reflects a mid-stage fabless semiconductor house optimizing for power and resilience. Hiring remains engineering-dominated (7 of 8 open roles) at mid-to-senior levels, concentrated in China, with no recent job postings—suggesting either full capacity or selective recruitment.

Tech Stack 26 technologies

Core StackSAP Oracle Python Linux 用友 Excel Word PowerPoint Verilog SystemVerilog AXI PCIe USB Perl FPGA TCL Calibre CMOS FinFET Bash CI/CD C RTOS ORCAD Allegro Tempus

What JLSemi Limited Is Building

◆Challenges

Environment permission issues

▲Active Projects

Build cad flow design environment
Maintain linux server environment
Develop automation scripts
Chip tape-out mass production project

Hiring Activity

Minimal8 roles · 0 in 30d

Department

Engineering

7

Sales

1

Seniority

Mid

5

Senior

3

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About JLSemi Limited

JLSemi, founded in 2009 and based in Shanghai, designs silicon for Ethernet connectivity across networking, automotive, and industrial applications. The company specializes in PHY (physical layer) and system-on-chip (SoC) implementations, prioritizing performance, range, resilience, and power efficiency. With 51–200 employees and a privately held structure, JLSemi operates as a fabless design house, managing CAD flows, tape-out processes, and Linux infrastructure in-house while using enterprise tools (SAP, Oracle, 用友) for business operations. The engineering-heavy team composition and active chip design projects indicate active product development cycles.

HeadquartersShanghai

Company Size51–200 employees

Founded2009

Hiring MarketsChina

Frequently Asked Questions

What technologies does JLSemi use for chip design?

JLSemi uses Verilog and SystemVerilog for RTL design, Calibre for physical verification, FPGA tools for prototyping, and mixed-signal design flows. Tape-out and production processes employ FinFET process nodes.

What products does JLSemi design?

JLSemi designs Ethernet PHY and SoC silicon for networking, automotive Ethernet, and industrial applications. Active projects include chip tape-out for mass production and CAD flow optimization.