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北京华峰测控技术股份有限公司 Tech Stack

Semiconductor test instrumentation and ATE solutions for power devices and SoCs

Information Technology & Services 北京市, 北京市 ~10 employees

Beijing Huafeng builds automated test equipment (ATE) for semiconductor validation, with particular focus on power semiconductor devices and system-on-chip (SoC) designs. The stack—HFSS, Cadence, Vivado, ModelSim across FPGA and PCIe/DDR4 interfaces—reflects a hardware-focused engineering org optimized for test board design and instrument control. Active challenges around test cost reduction and fault coverage expansion suggest the product roadmap is driven by manufacturing yield economics rather than feature expansion.

Tech Stack 44 technologies

Core StackMATLAB Visual Studio GitHub Linux Nginx Redis SQL Server MySQL C HFSS Cadence VGA VHDL Verilog Vivado ModelSim Aurora PCIe DDR4 Simulink FPGA Allegro C/C++ Windows USB Subversion Xilinx Tomcat MQTT Apache+14 more

What 北京华峰测控技术股份有限公司 Is Building

Challenges

  • Information security risk management
  • Compliance management
  • System deployment and migration
  • Server load balancing
  • Reducing test cost
  • Increasing fault coverage
  • Security audit remediation

Active Projects

  • Power semiconductor device test instrument development
  • Ate test solution for soc chips
  • Design test boards for accotest soc ate
  • Power supply design
  • Embedded power control software development
  • New product development
  • Existing product optimization
  • New material and structure development

Hiring Activity

Minimal35 roles · 0 in 30d

Department

Engineering
33
Security
2
Ops
1

Seniority

Mid
19
Junior
11
Senior
6
Company intelligence

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About 北京华峰测控技术股份有限公司

Huafeng Huafeng develops automated test equipment and ATE solutions for semiconductor manufacturers and design validation teams in China. The company operates across power semiconductor device testing, SoC test boards (including Accotest integration), and embedded power control firmware. Core offerings span test instrument hardware, PCIe/DDR4-based test interfaces, and ModelSim/Vivado-based validation flows. The engineering-heavy org (33 of 37 headcount) with mid-level seniority emphasis indicates a mature product with incremental optimization cycles rather than greenfield platform development.

Headquarters北京市, 北京市
Company Size~10 employees
Hiring MarketsChina

Frequently Asked Questions

What tech stack does Huafeng use for test instrument design?

Cadence, HFSS, Vivado, ModelSim, MATLAB/Simulink for instrument modeling; FPGA (Xilinx), PCIe, DDR4, and C/VHDL/Verilog for hardware implementation. Backend: Linux, Nginx, MySQL, Redis for test automation and data collection.

What is Huafeng working on?

Power semiconductor test instruments, SoC ATE solutions (including Accotest design), test board development, power supply design, and embedded control firmware. Current focus areas include reducing test cost and increasing fault coverage in validation workflows.

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