Fabless 5G/4G chipset design for cellular IoT connectivity
Bridgecom is a Munich-based fabless semiconductor house focused on wireless modem and RF chipset design for 5G and 4G IoT. The stack—Python, C/C++, MATLAB, FPGA simulation, and 3GPP standards tooling—reflects deep PHY-layer algorithm work; active projects span 5G NR PHY development, baseband design, and RF system verification. The engineering-skewed hiring (6 roles, all engineering; senior-weighted tenure mix) and decelerating hiring velocity suggest mature product development rather than scaling.
Bridgecom designs wireless semiconductor products for cellular IoT applications, operating as a fabless house headquartered in Munich. The team combines decades of wireless industry experience with active engineering work in 5G NR physical-layer algorithms, modem baseband design, and RF system verification. Products are built in close collaboration with customers and leverage a European partner network. The company currently employs 51–200 people and is actively hiring engineering talent across Germany and Austria, with an emphasis on senior and mid-level roles.
5G NR, 4G LTE, and 3GPP-based cellular IoT. Active development includes 5G NR PHY algorithms, modem baseband design, and RF system verification and test automation.
Core languages: Python, C/C++, MATLAB. Simulation and design: FPGA, 3GPP standards tools (5G NR, 4G), Git. Verification: Bugzilla, Jama Connect, in-house RF test automation frameworks.
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