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AXONNE Tech Stack

Fabless semiconductor design for automotive and robotics networking

Semiconductor Manufacturing San Jose, California 11–50 employees Founded 2018 Privately Held

Axonne designs high-speed networking silicon for in-vehicle and robotics applications, with a tech stack spanning analog/mixed-signal tools (Cadence, Synopsys, MATLAB/Simulink) and digital design (Verilog, SystemVerilog, FPGA). The company is actively building ASICs and next-generation physical-layer SoCs while managing supplier quality and manufacturing optimization—typical of early-stage fabless operations scaling from prototype to production. Engineering dominance (all 7 active hires) and a balanced mid/senior mix suggest execution focus on silicon bring-up and validation.

Tech Stack 23 technologies

Core StackPython C++ Linux MATLAB C I2C UART Ethernet SerDes Wireshark Cadence Allegro Altium Simulink SPC FMEA Six Sigma Verilog VHDL SystemVerilog Cadence Synopsys PTP FPGA

What AXONNE Is Building

◆Challenges

Power- and area-efficient dsp solutions
Reducing defects
Optimizing manufacturing processes
Supplier quality performance

▲Active Projects

Asic design for high-speed network applications in automotive domain
Silicon bring-up and validation tools
Feature and functional testing automation
Demonstrator development for trade shows and customer events
Proof-of-concept demonstrator creation with customers
Prototype commissioning and debugging
Next-generation physical layer/mixed-signal socs
Dsp architecture design

Hiring Activity

Decelerating7 roles · 1 in 30d

Department

Engineering

7

Seniority

Mid

3

Senior

3

Manager

1

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About AXONNE

Axonne is a fabless semiconductor design company founded in 2018 and headquartered in San Jose, California. The company develops high-speed networking solutions—primarily Ethernet and SERDES-based architectures—for automotive and robotics platforms. Products enable in-vehicle connectivity, data transfer, and security, with a focus on supporting AI and machine-learning workloads via software-defined networking. The team operates at 11–50 employees with active engineering presence in the United States and Germany, currently working on ASIC design, silicon validation, and next-generation mixed-signal SoCs.

HeadquartersSan Jose, California

Company Size11–50 employees

Founded2018

Hiring MarketsUnited States, Germany

Frequently Asked Questions

What is Axonne's technology stack?

Axonne uses Python, C, C++ for firmware; Verilog, VHDL, SystemVerilog for design; Cadence Allegro, Synopsys, and Altium for layout and simulation; MATLAB/Simulink for DSP architecture; and Wireshark for protocol validation. I2C, UART, Ethernet, and SerDes are core networking protocols.

What is Axonne working on?

Axonne is developing ASIC designs for high-speed automotive networking, next-generation physical-layer and mixed-signal SoCs, silicon bring-up and validation tools, DSP architecture, and proof-of-concept demonstrators for customer engagement and trade shows.