Network-on-chip interconnect IP and SoC integration automation software
Arteris supplies network-on-chip interconnect IP plus SoC integration and hardware security software to chip design teams. Its stack pairs RTL languages (SystemVerilog, VHDL, UVM, SystemC) with Synopsys, Cadence and Siemens EDA flows, while React and TypeScript point to a growing software tooling layer. Hiring is accelerating and senior-to-principal engineering heavy, with active work on AI features for EDA tools and pre-sales pilots that move proofs of concept toward production.
Arteris is a public semiconductor technology company headquartered in Campbell, California, founded in 2004 and employing 201–500 people. It develops network-on-chip interconnect IP, SoC integration automation software and hardware security assurance tools used by chip designers. Target markets include automotive, machine learning, 5G, networking, servers, IoT, enterprise computing and industrial applications. The company supports functional safety work aligned with ISO 26262 and hires across the United States and France.
Arteris works with Verilog, VHDL, SystemVerilog, SystemC, UVM and C++, EDA tools from Synopsys, Cadence and Siemens, plus Python, Tcl, Jenkins, Bazel, Jira, Confluence, React and TypeScript.
Yes. Hiring is accelerating and dominated by engineering, skewed toward senior, staff and principal levels, with smaller marketing, sales and security openings in the United States and France.
Current initiatives include SoC design automation, interconnect and memory hierarchy solutions, AI features for EDA tools, ISO 26262 compliance for IP, fault injection analysis and pre-sales pilot projects.
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Arteris's technology stack, projects, and hiring signals are inferred from public hiring and company data — career pages, public listings, and company web presence — then clustered and de-duplicated. Figures are estimates that refresh over time. Read our full methodology →
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